1. Field of the Invention
The present invention relates to the fabrication of a liquid crystal display device with a plurality of thin film transistors (hereinafter, referred to as a "TFT-LCD device"). In particular, the present invention is a method for fabricating a TFT-LCD capable of repairing a point defect such as an electrical short between a pixel and a thin film transistor (hereinafter, referred to as "TFT"), or between a bus line and a pixel, while fabricating the device.
2. Description of the Related Art
Generally, a defect in a TFT-LCD can be broadly classified into two types, one of which is a point defect due to an inferior TFT, pixel electrode, pixel or the like. The other is a line defect due to an electrical open or short circuit of a bus line, or no interconnection to a driving IC (integrated circuit). Defects that occur frequently in a TFT-LCD include an electrical short at a crossover between the gate and data bus lines, an electrical short between the gate and source electrodes of a TFT, and an electrical open circuit of each of gate and data bus lines.
As TFT-LCD devices become large in scale and highly integrated, it is necessary to solve the above described defects during fabrication of the TFT-LCDs. Thus, TFT-LCDs with redundancy or repair structures have been proposed.
FIG. 1 is a plan view of a prior art TFT-LCD with a repair structure. FIG. 2A is a cross-sectional view taken along the line A-A' in FIG. 1. FIG. 2B is a cross-sectional view taken along the line B-B' in FIG. 1.
Referring to FIG. 1, a prior art TFT-LCD comprises a plurality of pixel electrodes 40 and TFTs 10 arranged in a matrix of rows and columns, and a plurality of gate and data bus lines 20 and 30, respectively. In this TFT-LCD, the pixel electrode 40 and the TFT 10 are alternately arranged with respect to each other. The gate bus line 20 is extended between the pixel electrodes and is commonly connected to gates of the TFTs 10 arranged in the same row. The data bus line 30 is formed in a zigzag pattern between the pixel electrodes, and is commonly connected to source electrodes of the TFTs 10 arranged in the same column.
With reference to FIGS. 2A and 2B, each of the TFTs 10 has a gate electrode 11 formed on a glass substrate 100, a gate insulating layer 12 formed over the substrate, and a semiconductor layer 13 formed above the gate electrode 11 with the gate insulating layer 12 interposed therebetween. The semiconductor layer 13 can be composed of amorphous silicon. A channel protecting layer 14 is formed on the semiconductor layer 13. An n.sup.+ type amorphous silicon ohmic layer 15 is formed over the semiconductor layer 13 and the sides of the channel protecting layer 14 (but not the center surface of the channel protecting layer 14). A redundancy ITO (indium tin oxide) pattern 16 is formed on the gate insulating layer 12, including over one side of the ohmic layer 15. A drain electrode 18 is formed on the gate insulating layer 12, including over the other side of the ohmic layer 15. A source electrode 17 is formed on the ohmic layer 15 and the ITO pattern 16.
Since the ITO pattern 16 is formed between the data bus line 30 and the semiconductor layer 13, it can be used for redundancy when an electrical short occurs in the data bus line 30. Between the source electrode 17 and the gate insulating layer 12, the pixel electrode 40 composed of ITO is formed. A passivation layer 50 is formed thereon as shown in FIGS. 2A and 2B.
The above-described TFT-LCD can be fabricated by the following method. On a glass substrate 100, a metal layer is formed by sputtering, and then patterned to form a gate electrode 11 and a gate bus line 20. A gate insulating layer 12, an amorphous silicon layer 13, and an insulating layer 14 are then sequentially deposited by CVD (chemical vapor deposition) on the substrate 10 and gate electrode 11.
Next, the insulating layer 14 is selectively etched back to form a channel protecting layer 14 on the amorphous silicon layer 13 corresponding to the gate electrode 11. This channel protecting layer 14 serves as an etching stopper when the ohmic layer 15 on the amorphous silicon semiconductor layer 13 is etched, to prevent damage to the amorphous silicon layer.
The n.sup.+ type amorphous silicon layer 15 is formed on the amorphous silicon layer 13, including over the channel protecting layer 14. The amorphous silicon layers 15 and 13 are then sequentially removed to form the semiconductor layer and the ohmic layer at the same time. The gate insulating layer 12 within a pad portion is also removed by etching to expose the pad electrode.
Subsequently, an ITO film is formed over the substrate and patterned to form a pixel electrode 40, and at the same time to form an ITO pattern 16 for redundancy. The ITO pattern 16 is formed at a portion where the data bus line is formed. After the deposition of a metal over the substrate, a photo-etching process is performed, thereby allowing source and drain electrodes 17 and 18 to be formed on the ohmic layer and the ITO pattern, and on the ohmic layer and the pixel electrode, respectively. The data bus line 30 is formed on the ITO pattern 16. Finally, to prevent static electricity and form an oxide layer, the source and drain electrodes 17 and 18 connected to each other are electrically isolated by etching, and then a protecting layer 50 is formed thereon.
When a signal voltage is applied to the source and drain electrodes of a TFT-LCD fabricated in the manner described above, electrons are produced in the semiconductor layer 13. A current signal is thereby provided to the drain electrode, causing the pixel corresponding to each TFT to be driven.
Since in the prior art TFT-LCD the ITO film for redundancy is formed under a data bus line, an electrical open circuit in the data bus line can be repaired by using the ITO film. However, while photo-etching during fabrication of the above-described TFT-LCD, a non-exposed portion of a photoresist layer is produced by the presence of dust and particles of photoresist. Then, due to the non-exposed portion, an electrical short circuit between source and drain electrodes can occur and cause a point defect. Since point defects of this type can not be repaired in the prior art TFT-LCD, production yields are lowered.